The present invention relates to the field of integrated circuit design and fabrication; more specifically, it relates to voltage contrast characterization structures and methods for within chip process variation characterization as well as a computer based design system for generating voltage contrast characterization structures.
The current demand for high performance microelectronics requires more and more functions to be integrated into one chip which drives increased chip size. Current characterization structures are placed in the kerf area (non-functional perimeter regions) of the chip in order to represent all regions of the chip. However, as the size of integrated circuit chips increase, characterization structures in the kerf do not represent variation within the chip which are becoming more pronounced as the chip size increases.
Accordingly, there exists a need in the art to mitigate the deficiencies and limitations described hereinabove.